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rt9193 1 ds9193-09 march 2007 www.richtek.com 300ma, ultra-low noise, ultra-fast cmos ldo regulator marking information for marking information, contact our sales representative directly or through a richtek distributor located in your area, otherwise visit our website for detail. ordering information general description the rt9193 is designed for portable rf and wireless applications with demanding performance and space requirements. the rt9193 performance is optimized for battery-powered systems to deliver ultra low noise and low quiescent current. a noise bypass pin is available for further reduction of output noise. regulator ground current increases only slightly in dropout, further prolonging the battery life. the rt9193 also works with low-esr ceramic capacitors, reducing the amount of board space necessary for power applications, critical in hand-he ld wireless devices. the rt9193 consumes less than 0.01 a in shutdown mode and has fast turn-on time less than 50 s. the other features include ultra low dropout voltage, high output accuracy, current limiting protection, and high ripple rejection ratio. available in the 5-lead of sc-70, sot-23 and wdfn-6l 2x2 packages. features z z z z z ultra-low-noise for rf application z z z z z ultra-fast response in line/load transient z z z z z quick start-up (typically 50 s) z z z z z < 0.01 a standby current when shutdown z z z z z low dropout : 220mv @ 300ma z z z z z wide operating voltage ranges : 2.5v to 5.5v z z z z z ttl-logic-controlled shutdown input z z z z z low temperature coefficient z z z z z current limiting protection z z z z z thermal shutdown protection z z z z z only 1 f output capacitor required for stability z z z z z high power supply rejection ratio z z z z z custom voltage available z z z z z rohs compliant and 100% lead (pb)-free applications z cdma/gsm cellular handsets z battery-powered equipment z laptop, palmtops, notebook computers z hand-held instruments z pcmcia cards z portable information appliances note : richtek pb-free and green products are : ` rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ` suitable for use in snpb or pb-free soldering processes. ` 100% matte tin (sn) plating. pin configurations (top view) sc-70-5/sot-23-5 wdfn-6l 2x2 vin gnd bp vout en 2 3 5 4 1 en gnd bp nc vout vin 5 4 1 2 3 6 rt9193- package type u5 : sc-70-5 b : sot-23-5 qw : wdfn-6l 2x2 (w-type) output voltage 15 : 1.5v 16 : 1.6v : 49 : 4.9v 50 : 5.0v 1h : 1.85v 2h : 2.85v 4g : 4.75v operating temperature range p : pb free with commercial standard g : green (halogen free with commer- cial standard)
rt9193 2 ds9193-09 march 2007 www.richtek.com function block diagram functional pin description pin name pin function en chip enable (active high). note that this pin is high impedance. there should be a pull low 100k resistor connected to gnd when t he control signal is floating. bp reference noise bypass gnd ground vout output voltage vin power input voltage typical application circuit current-limit and thermal protection mos driver + - vout shutdown and logic control vin error amplifier v ref bp en gnd quick start vin gnd vout rt9193 c out 1uf/x7r c in 1uf/x7r v in v out en bp c bp 22nf chip enable
rt9193 3 ds9193-09 march 2007 www.richtek.com electrical characteristics (v in = v out + 1v, c in = c out = 1 f, c bp = 22nf, t a = 25 c, unless otherwise specified) parameter symbol test conditions min typ max units output voltage accuracy v out i out = 1ma ? 2 -- +2 % current limit i lim r load = 1 360 400 -- ma quiescent current i q v en 1.2v, i out = 0ma -- 90 130 a i out = 200ma, v out > 2.8v 170 200 dropout voltage (note 5) v drop i out = 300ma, v out > 2.8v -- 220 300 mv line regulation v line v in = (v out + 1v) to 5.5v, i out = 1ma -- -- 0.3 % load regulation v load 1ma < i out < 300ma -- -- 0.6 % standby current i stby v en = gnd, shutdown -- 0.01 1 a en input bias current i ibsd v en = gnd or vin -- 0 100 na logic-low voltage v il v in = 3v to 5.5v, shutdown -- -- 0.4 en threshold logic-high voltage v ih v in = 3v to 5.5v, start-up 1.2 -- -- v output noise voltage e no 10hz to 100khz, i out = 200ma c out = 1 f -- 100 -- v rms f = 100hz -- ? 70 -- power supply rejection rate f = 10khz psrr c out = 1 f, i out = 10ma -- ? 50 -- db thermal shutdown temperature t sd -- 165 -- c absolute maximum ratings (note 1) z supply input v oltage ------------------------------------------------------------------------------------------------------ 6v z power dissipation, p d @ t a = 25 c sc-70-5 ---------------------------------------------------------------------------------------------------------------------- 300mw sot-23-5 -------------------------------------------------------------------------------------------------------------------- 400mw wdfn-6l 2x2 -------------------------------------------------------------------------------------------------------------- 606mw z package thermal resistance (note 4) sot-70-5, ja --------------------------------------------------------------------------------------------------------------- 333 c/w sot-23-5, ja --------------------------------------------------------------------------------------------------------------- 250 c/w wdfn-6l 2x2, ja --------------------------------------------------------------------------------------------------------- 165 c/w z junction temperature ----------------------------------------------------------------------------------------------------- 150 c z lead temperature (soldering, 10 sec.) ------------------------------------------------------------------------------- 260 c z storage temperature range -------------------------------------------------------------------------------------------- ? 65 c to 150 c z esd susceptibility (note 2) hbm (human body mode) ---------------------------------------------------------------------------------------------- 2kv mm (ma chine mode) ------------------------------------------------------------------------------------------------------ 200v recommended operating conditions (note 3) z supply input v oltage ------------------------------------------------------------------------------------------------------ 2.5v to 5.5v z en input v oltage ----------------------------------------------------------------------------------------------------------- 0v t o 5.5v z junction temperature range -------------------------------------------------------------------------------------------- ? 40 c to 125 c z ambient temperature range -------------------------------------------------------------------------------------------- ? 40 c to 85 c to be continued
rt9193 4 ds9193-09 march 2007 www.richtek.com note 1. stresses listed as the above "absolute maximum ratings" may cause permanent damage to the device. these are for stress ratings. functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. note 2. devices are esd sensitive. handling precaution recommended. note 3. the device is not guaranteed to function outside its operating conditions. note 4. ja is measured in the natural convection at t a = 25 c on a low effective thermal conductivity test board (single layer, 1s) of jedec 51-3 thermal measurement standard. note 5. the dropout voltage is defined as v in -v out , which is measured when v out is v out(normal) ? 100mv. parameter symbol test conditions min typ max units thermal shutdown temperature h y steresis t sd -- 30 -- c
rt9193 5 ds9193-09 march 2007 www.richtek.com dropout voltage vs. load current 0 50 100 150 200 250 300 0 0.05 0.1 0.15 0.2 0.25 0.3 load current (a) dropout voltage (mv) rt9193-33cb c in = c out = 1uf t j = 125 c t j = 25 c t j = -40 c typical operating characteristics psrr -80 -60 -40 -20 0 20 0.01 0.1 1 10 100 1000 frequency (khz) psrr (db) i load = 10ma i load = 100ma 10 100 1k 10k 100k 1m (hz) v in = 4v to 5v c in = c out = 1u f, x7r en pin shoutdown threshold vs. temperature 0.5 0.75 1 1.25 1.5 1.75 -50 -25 0 25 50 75 100 125 temperature en pin shoutdown threshold (v) ( c) rt9193-15cu5 v in = 3.3v c in = c out = 1uf x7r quiescent current vs. temperature 60 65 70 75 80 85 90 95 -50-250 255075100125 temperature quiescent current (ua) ( c) rt9193-15cu5 v in = 3.3v c in = c out = 1uf x7r output voltage vs. temperature 1.2 1.3 1.4 1.5 1.6 1.7 1.8 -50 -25 0 25 50 75 100 125 temperature output voltage (v) ( c) rt9193-15cu5 v in = 3.3v c in = c out = 1uf x7r time (500 s/div) v in = 5v c in = c out = 1uf en pin shutdown response en pin voltage (v) output voltage (v) rt9193-28cu5 no load 10 5 0 2 1 0
rt9193 6 ds9193-09 march 2007 www.richtek.com time (10ms/div) v in = 4.5v c in = c out = 1uf, x7r noise noise ( v) 200 100 0 -100 -200 rt9193-15cu5 i load = 50ma f = 10hz to 100khz time (10ms/div) v in = 4.5v c in = c out = 1uf, x7r noise noise ( v) 200 100 0 -100 -200 rt9193-30cb i load = 50ma f = 10hz to 100khz time (100 s/div) line transient response output voltage deviation (mv) input voltage deviation (v) 6 5 4 10 0 -10 v in = 4v to 5v c out = 1uf rt9193-25cb i load = 100ma time (50 s/div) v in = 4v to 5v c out = 1uf line transient response output voltage deviation (mv) input voltage deviation (v) rt9193-25cb i load = 1ma 6 5 4 10 0 -10 time (500 s/div) v in = 5v, v out = 2.8v c in = c out = 1uf load transient response output voltage deviation (mv) load current (ma) i load = 1ma to 60ma 100 50 0 20 0 -20 time (500 s/div) load transient response output voltage deviation (mv) load current (ma) i load = 1ma to 250ma 400 200 0 50 0 -50 v in = 5v, v out = 2.8v c in = c out = 1uf
rt9193 7 ds9193-09 march 2007 www.richtek.com time (10 s/div) v in = 5v c in = c out = 1uf start up en pin voltage (v) output voltage (v) 10 5 0 2 1 0 rt9193-28cu5 no load
rt9193 8 ds9193-09 march 2007 www.richtek.com applications information like any low-dropout regulator, the external capacitors used with the rt9193 must be carefully selected for regulator stability and performance. using a capacitor whose value is > 1 f on the rt9193 input and the amount of capacitance can be increased without limit. the input capacitor must be located a distance of not more than 0.5 inch from the input pin of the ic and returned to a clean analog ground. any good quality ceramic or tantalum can be used for this capacitor. the capacitor with larger value and lower esr (equivalent series resistance) provides better psrr and line-transient response. the output capacitor must meet both requirements for minimum amount of capacitance and esr in all ldos application. the rt9193 is designed specifically to work with low esr ceramic output capacitor in space-saving and performance consideration. using a ceramic capacitor whose value is at least 1 f with esr is > 25m on the rt9193 output ensures stability. the rt9193 still works well with output capacitor of other types due to the wide stable esr range. figure 1 shows the curves of allowable esr range as a function of load current for various output capacitor values. output capacitor of larger capacitance can reduce noise and improve load transient response, stability, and psrr. the output capacitor should be located not more than 0.5 inch from the v out pin of the rt9193 and returned to a clean analog ground. figure 1 bypass capacitor and low noise connecting a 22nf between the bp pin and gnd pin significantly reduces noise on the regulator output, it is critical that the capacitor connection between the bp pin and gnd pin be direct and pcb traces should be as short as possible. there is a relationship between the bypass capacitor value and the ldo regulator turn on time. dc leakage on this pin can affect the ldo regulator output noise and voltage regulation performance. enable function the rt9193 features an ldo regulator enable/disable function. to assure the ldo regulator will switch on, the en turn on control level must be greater than 1.2 volts. the ldo regulator will go into the shutdown mode when the voltage on the en pin falls below 0.4 volts. for to protecting the system, the rt9193 have a quick-discharge function. if the enable function is not needed in a specific application, it may be tied to v in to keep the ldo regulator in a continuously on state. thermal considerations thermal protection limits power dissipation in rt9193. when the operation junction temperature exceeds 165 c, the otp circuit starts the thermal shutdown function turn the pass element off. the pass element turn on again after the junction temperature cools by 30 c. for continue operation, do not exceed absolute maximum operation junction temperature 125 c. the power dissipation definition in device is : p d = (v in ? v out ) x i out + v in x i q the maximum power dissipation depends on the thermal resistance of ic package, pcb layout, the rate of surroundings airflow and temperature difference between junction to ambient. the maximum power dissipation can be calculated by following formula : p d(max) = ( t j(max) ? t a ) / ja where t j(max) is the maximum operation junction temperature 125 c, t a is the ambient temperature and the ja is the junction to ambient thermal resistance. region of stable c out esr vs. load current 0.00 0.01 0.10 1.00 10.00 100.00 0 50 100 150 200 250 300 load current (ma) c out esr ( ? ) simulation verify instable stable 100 10 1 rt9193-15cu5 c in = c out = 1uf, x7r
rt9193 9 ds9193-09 march 2007 www.richtek.com for recommended operating conditions specification of rt9193, where t j(max) is the maximum junction temperature of the die (125 c) and t a is the maximum ambient temperature. the junction to ambient thermal resistance ( ja is layout dependent) for sot-23-5 package is 250 c/w, sc-70-5 package is 333 c/w and wdfn-6l 2x2 package is 165 c/w on standard jedec 51-3 thermal test board. the maximum power dissipation at t a = 25 c can be calculated by following formula : p d(max) = (125 c ? 25 c) / 333 = 300mw (sc-70-5) p d(max) = (125 c ? 25 c) / 250 = 400mw (sot-23-5) p d(max) = (125 c ? 25 c) / 165 = 606mw (wdfn-6l 2x2) the maximum power dissipation depends on operating ambient temperature for fixed t j(max) and thermal resistance ja . for rt9193 packages, the figure 2 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power allowed. figure 2. derating curve for packages 0 100 200 300 400 500 600 700 0 25 50 75 100 125 150 ambient temperature (c) power dissipation (mw) sot-23-5 sc 70-5 wdfn-6l 2x2
rt9193 10 ds9193-09 march 2007 www.richtek.com a a1 e b b d c h l sc - 70 - 5 surface mount package dimensions in millimeters dimensions in inches symbol min max min max a 0.800 1.100 0.031 0.044 a1 0.000 0.100 0.000 0.004 b 1.150 1.350 0.045 0.054 b 0.150 0.400 0.006 0.016 c 1.800 2.450 0.071 0.096 d 1.800 2.250 0.071 0.089 e 0.650 0.026 h 0.080 0.260 0.003 0.010 l 0.210 0.460 0.008 0.018 outline dimension
rt9193 11 ds9193-09 march 2007 www.richtek.com a a1 e b b d c h l sot-23-5 surface mount package dimensions in millimeters dimensions in inches symbol min max min max a 0.889 1.295 0.035 0.051 a1 0.000 0.152 0.000 0.006 b 1.397 1.803 0.055 0.071 b 0.356 0.559 0.014 0.022 c 2.591 2.997 0.102 0.118 d 2.692 3.099 0.106 0.122 e 0.838 1.041 0.033 0.041 h 0.080 0.254 0.003 0.010 l 0.300 0.610 0.012 0.024
rt9193 12 ds9193-09 march 2007 www.richtek.com richtek technology corporation headquarter 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 fax: (8863)5526611 richtek technology corporation taipei office (marketing) 8f, no. 137, lane 235, paochiao road, hsintien city taipei county, taiwan, r.o.c. tel: (8862)89191466 fax: (8862)89191465 email: marketing@richtek.com dimensions in millimeters dimensions in inches symbol min max min max a 0.700 0.800 0.028 0.031 a1 0.000 0.050 0.000 0.002 a3 0.175 0.250 0.007 0.010 b 0.200 0.350 0.008 0.014 d 1.950 2.050 0.077 0.081 d2 1.000 1.450 0.039 0.057 e 1.950 2.050 0.077 0.081 e2 0.500 0.850 0.020 0.033 e 0.650 0.026 l 0.300 0.400 0.012 0.016 w-type 6l dfn 2x2 package d 1 e a3 a a1 e b l d2 e2 see detail a 1 1 2 2 note : the configuration of the pin #1 identifier is optional, but must be located within the zone indicated. det ail a pin #1 id and tie bar mark options

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